A project to reflash corrupted BIOS chips.

Affordable BIOS Restoration Tool

CPLD Explained

I always have a tough time explaining CPLD’s. So bear with me if I don’t do a very good job.

The explanation for non technical people.

CPLD’s and FPGA’s are similar to rewritable cd’s except instead of writing music you are writing electronic chips. In the days before rewritable cd’s you could buy a cd very cheaply because while it costs tons of money to make the first master cd it was very cheap to make copies. So the more copies of a cd that were sold the more the costs of making the original cd were recouped. The electronics industry works the same way. It costs a lot of money to develop a new chip but once that chip works it is cheap to make copies. A CPLD/FPGA is like the first rewritable cd’s. It was very expensive and limited in the beginning but it did allow you to write a cd without the up front costs of a master. CPLD/FPGA’s are following the same trend as cd’s in that they are increasingly becoming more powerful and cheaper. While they are not yet cheap and powerful enough to write a Pentium processor on them they can do quite a bit. Xilinx’s new Spartan-3 FPGA has enough room to implement a 32-bit RISC processor that can run Linux at around 75+ MIPS. There is even enough room left over to implement a VGA controller and other peripherals, all on a chip that costs less than $30. So it is reasonable to expect that they will be revolutionary to the electronics field when they become cheaper and more powerful.

Explanation for technical people.

You can think of a CPLD/FPGA as a sea of interconnected transistors. As you know the most complex processor from Intel is a bunch of transistors all connected in a manner that implements the desired digital logic. That digital logic is defined with a Hardware Description Language such as Verilog or VHDL. So using the same HDL’s that Intel uses it is possible to synthesize digital logic onto a CPLD/FPGA to perform the desired functions described in the HDL. This is a simplified explanation and is probably not entirely correct but from a practical standpoint it helps to understand the potential of CPLD/FPGA’s.